Documentation is now handled by the same processes we use for code: Add something to the Documentation/ directory in the coreboot repo, and it will be rendered to https://doc.coreboot.org/. Contributions welcome!
The Dell Latitude C610 is an older laptop with Intel i830 chipset. We're currently evaluating if it's possible to write coreboot support for it.
Overview:
lspci -tvnn:
-[0000:00]-+-00.0 Intel Corporation 82830 830 Chipset Host Bridge [8086:3575] +-01.0-[0000:01]----00.0 ATI Technologies Inc Radeon Mobility M6 LY [1002:4c59] +-1d.0 Intel Corporation 82801CA/CAM USB Controller #1 [8086:2482] +-1e.0-[0000:02-10]--+-00.0 3Com Corporation 3c905C-TX/TX-M [Tornado] [10b7:9200] | +-01.0 Texas Instruments PCI1420 PC card Cardbus Controller [104c:ac51] | +-01.1 Texas Instruments PCI1420 PC card Cardbus Controller [104c:ac51] | \-03.0 Atheros Communications Inc. Atheros AR5001X+ Wireless Network Adapter [168c:0013] +-1f.0 Intel Corporation 82801CAM ISA Bridge (LPC) [8086:248c] +-1f.1 Intel Corporation 82801CAM IDE U100 Controller [8086:248a] \-1f.5 Intel Corporation 82801CA/CAM AC'97 Audio Controller [8086:2485]
cat /proc/cpuinfo:
processor : 0 vendor_id : GenuineIntel cpu family : 6 model : 11 model name : Mobile Intel(R) Pentium(R) III CPU - M 1200MHz stepping : 4 cpu MHz : 1196.037 cache size : 512 KB fdiv_bug : no hlt_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 2 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 sep mtrr pge mca cmov pse36 mmx fxsr sse up bogomips : 2392.07 clflush size : 32 power management:
System booting
Board, front
Board, back
Video, front
Video, back
CPU
CPU, northbridge
Ethernet
PCMCIA
Southbridge
Super I/O, EC
Flash ROM
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