Console and outputs: Difference between revisions
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{| class="wikitable" border="1" | {| class="wikitable" border="1" | ||
! Output name | ! Output name | ||
! direction (from the target | ! direction (from the coreboot target machine point of view) | ||
! Requirements | ! Requirements | ||
! | ! Compatibility with software loaded after coreboot, like OS and payloads | ||
|- | |- | ||
! [[Serial console]] | ! [[Serial console]] | ||
Line 12: | Line 12: | ||
* output | * output | ||
| | | | ||
* | * A supported serial port: | ||
** it can be on the mainboard | ** it can be on the mainboard | ||
** it can also be a PCIe OXPCIe952 card with the 0x1415 and 0xc158 vendor and device ID (respectively). | ** it can also be a PCIe OXPCIe952 card with the 0x1415 and 0xc158 vendor and device ID (respectively). | ||
** USB serial ports are not supported by | ** USB serial ports are not supported by this driver, see EHCI debug port for that. | ||
| | | | ||
* seabios | * seabios | ||
Line 32: | Line 32: | ||
* An USB debug port supported by coreboot. | * An USB debug port supported by coreboot. | ||
* To find on which usb connector it goes. | * To find on which usb connector it goes. | ||
* A supported dongle: | |||
** A GNU/Linux computer with usb peripheral or OTG and the g_dbpg driver. Single Board computers typically have that. | |||
| | | | ||
* grub | * grub | ||
* linux kernel in its early initialisation (I'm not sure that it can be kept afterward, because, after the early initialisation, by default it tries to initialise the USB port normally) | * linux kernel in its early initialisation (I'm not sure that it can be kept afterward, because, after the early initialisation, by default it tries to initialise the USB port normally) | ||
|- | |||
! [[EHCI Debug Port| Console Over USB serial port through EHCI debug port]] | |||
(sends coreboot logs over the usb debug port) | |||
| | |||
* input (probably not in coreboot) | |||
* output | |||
| | |||
* An USB debug port supported by coreboot. | |||
* To find on which usb connector it goes. | |||
* A supported dongle: | |||
** FTDI FT232H Serial adapter | |||
| | |||
* grub | |||
* linux kernel | |||
|- | |- | ||
! [[Spkmodem| Console trough spkmodem]] | ! [[Spkmodem| Console trough spkmodem]] | ||
Line 41: | Line 58: | ||
* output only | * output only | ||
| | | | ||
* A working | * A working sound card that can emmit beeps boot. | ||
* On some laptops it's necessary to | * On some laptops it's necessary to make sure the sound is enabled and the volume is correct to work: | ||
** On many laptops it can be done beforehand in GNU/Linux. | |||
| | | | ||
For writting to it from the coreboot target computer: | For writting to it from the coreboot target computer: | ||
Line 71: | Line 89: | ||
* It requires the computer to be booted to retrive the logs. | * It requires the computer to be booted to retrive the logs. | ||
| | | | ||
* | * To be able to boot the computer to retrieve the logs, or to extract them from the RAM. | ||
| | | | ||
For writting to the buffer which is in the coreboot target computer: | For writting to the buffer which is in the coreboot target computer: | ||
Line 80: | Line 98: | ||
* grub with the cbmemc command | * grub with the cbmemc command | ||
* coreboot's userspace cbmem -c uttility | * coreboot's userspace cbmem -c uttility | ||
|- | |||
|- | |||
! [[POST card]] | |||
| | |||
* output only. | |||
| | |||
| | |||
|- | |- | ||
|} | |} | ||
* [[ | If none of the above works for your case, you might consider: | ||
* | * Trying [[Developer_Manual/Tools#Flash_emulators_.28used_to_flash_and_debug.29 | Flash emulators]] to trace the code being accessed. | ||
* [[Developer_Manual/Tools#Oscilloscope| Osciloscopes]] for hardware related lower level debuging. | |||
* [https://www.serialice.com SerialICE] if you can add support for your board serial or [[EHCI Debug Port]] in [https://www.serialice.com SerialICE] |
Latest revision as of 17:01, 24 February 2018
Coreboot has various possible consoles:
Output name | direction (from the coreboot target machine point of view) | Requirements | Compatibility with software loaded after coreboot, like OS and payloads |
---|---|---|---|
Serial console
(sends coreboot logs over the serial port) |
|
|
|
Console Over EHCI debug port
(sends coreboot logs over the usb debug port) |
|
|
|
Console Over USB serial port through EHCI debug port
(sends coreboot logs over the usb debug port) |
|
|
|
Console trough spkmodem
(sends coreboot logs over the sound card) |
|
|
For writting to it from the coreboot target computer:
For reading it from a remote computer:
|
Network console
(sends coreboot logs over the network) |
|
|
For sending the logs:
For receiving the logs:
|
Cbmem console
(Ram buffer, like dmesg) |
|
|
For writting to the buffer which is in the coreboot target computer:
For reading the buffer on the coreboot target computer, after coreboot booted:
|
POST card |
|
If none of the above works for your case, you might consider:
- Trying Flash emulators to trace the code being accessed.
- Osciloscopes for hardware related lower level debuging.
- SerialICE if you can add support for your board serial or EHCI Debug Port in SerialICE