AMD XHCI: Difference between revisions
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(embedded microcontroller in FCH XHCI controller is not a V850, but probably a V850E1) |
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|0x0000 ||2 ||Firmware version - 0x3032 means 3.0.3.2 || | |0x0000 ||2 ||Firmware version - 0x3032 means 3.0.3.2 || | ||
|- | |- | ||
|0x0002 ||- ||Firmware data, most likely | |0x0002 ||- ||Firmware data, most likely V850E1 controller || | ||
|} | |} | ||
The firmware in blobs repository is 3.0.3.2, quite common version 3.0.3.4.0.8 found on the internet matches well 0xcf0 bytes. It is not know where the 0.8 subversion is stored. | The firmware in blobs repository is 3.0.3.2, quite common version 3.0.3.4.0.8 found on the internet matches well 0xcf0 bytes. It is not know where the 0.8 subversion is stored. | ||
Revision as of 10:13, 22 January 2015
AMD XHCI
The AMD XHCI controller in Hudson chip seems to be IP Core of Renesas uPD720200/200A. It looks the firmware consists of multi parts:
| Offset | Size in bytes | What | |
|---|---|---|---|
| 0x0000 | 2 | Signature 0x55aa | |
| 0x0002 | 2 | Offset to the BCD (type0?) | |
| 0x0004 | 2 | BCD size | |
| 0x0006 | 2 | Offset to Main FW (type1?) | |
| 0x0008 | 2 | Main FW size | |
| 0x000a | 2 | Offset to the ACD (type2?) | |
| 0x000c | 2 | Offset to the ACD |
| Offset | Size in bytes | What | |
|---|---|---|---|
| 0x0000 | 2 | Firmware version - 0x3032 means 3.0.3.2 | |
| 0x0002 | - | Firmware data, most likely V850E1 controller |
The firmware in blobs repository is 3.0.3.2, quite common version 3.0.3.4.0.8 found on the internet matches well 0xcf0 bytes. It is not know where the 0.8 subversion is stored.