Intel Management Engine: Difference between revisions
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| [https://en.wikipedia.org/wiki/Intel_Active_Management_Technology AMT] | | [https://en.wikipedia.org/wiki/Intel_Active_Management_Technology AMT] | ||
| rowspan="1" | GM45/GS45 | | rowspan="1" | GM45/GS45 | ||
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The ME is inside the [https://en.wikipedia.org/wiki/Platform_Controller_Hub PCH], it: | The ME is inside the [https://en.wikipedia.org/wiki/Platform_Controller_Hub PCH], it: | ||
* Has access to the computer's memory/RAM | * Has access to the computer's memory/RAM | ||
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| [https://en.wikipedia.org/wiki/Intel_Active_Management_Technology AMT] | | [https://en.wikipedia.org/wiki/Intel_Active_Management_Technology AMT] | ||
| rowspan="2" | [https://en.wikipedia.org/wiki/Nehalem_%28microarchitecture%29 Nehalem] | | rowspan="2" | [https://en.wikipedia.org/wiki/Nehalem_%28microarchitecture%29 Nehalem] | ||
| rowspan="2" | | | rowspan="2" | | ||
* Signed firmware | * Signed firmware | ||
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| [http://review.coreboot.org/gitweb?p=blobs.git;a=tree;f=mainboard/samsung/lumpy;h=b4c159f20789c0eacdf5a25135a3275d277cf256;hb=HEAD me.bin] | | [http://review.coreboot.org/gitweb?p=blobs.git;a=tree;f=mainboard/samsung/lumpy;h=b4c159f20789c0eacdf5a25135a3275d277cf256;hb=HEAD me.bin] | ||
| rowspan="3" | [https://en.wikipedia.org/wiki/Sandy_Bridge_%28microarchitecture%29 Sandy Bridge] | | rowspan="3" | [https://en.wikipedia.org/wiki/Sandy_Bridge_%28microarchitecture%29 Sandy Bridge] | ||
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* Signed firmware | * Signed firmware | ||
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| [http://review.coreboot.org/gitweb?p=blobs.git;a=tree;f=mainboard/google/butterfly;h=8b288bd915906a18379718be4b6080a3fd2cc554;hb=HEAD me.bin] | | [http://review.coreboot.org/gitweb?p=blobs.git;a=tree;f=mainboard/google/butterfly;h=8b288bd915906a18379718be4b6080a3fd2cc554;hb=HEAD me.bin] | ||
| rowspan="7" | [https://en.wikipedia.org/wiki/Ivy_Bridge_%28microarchitecture%29 Ivy Bridge] | | rowspan="7" | [https://en.wikipedia.org/wiki/Ivy_Bridge_%28microarchitecture%29 Ivy Bridge] | ||
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* Signed firmware | * Signed firmware | ||
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| rowspan="2" | [https://en.wikipedia.org/wiki/Haswell_%28microarchitecture%29 Haswell] | | rowspan="2" | [https://en.wikipedia.org/wiki/Haswell_%28microarchitecture%29 Haswell] | ||
| rowspan="2" | | | rowspan="2" | | ||
* Signed firmware | * Signed firmware |
Revision as of 13:26, 14 June 2016
Uses of the Management Engine
The management engine(Often abreviated ME) is a CPU which permits Out of band management of the computer. See the Wikipedia AMT article for example use cases.
Freedom and security issues
- The code that is running inside the management engine is proprietary and signed
- The management engine CPU has access to a lot of things, see "ME physical capabilities" for more details.
Where
Board | Firmware | Microarchitecture | ME location and physical capabilities | ME restrictions |
---|---|---|---|---|
Lenovo X60/X60s/X60T | None. <ref name="nic-amt">The Ethernet controller is capable of running some fimrwares( like AMT 1.0), but the hardware is not configured to do it on that machine. So no firmwares are loaded. See Intel_82573_Ethernet_controller for more details.</ref> | I945 + ICH7 |
|
|
Lenovo T60 | ||||
Lenovo x200 | AMT | GM45/GS45 |
The ME is inside the PCH, it:
|
|
Lenovo x201 | AMT | Nehalem |
| |
Packard Bell EasyNote LM85 (MS2290) | AMT? | |||
Samsung Series 5 550 Chromebook | me.bin | Sandy Bridge |
| |
Samsung Series 3 Chromebox | me.bin | |||
Lenovo t520 | AMT | |||
Google/HP Pavilion Chromebook 14 | me.bin | Ivy Bridge |
| |
Google Chromebook Pixel | me.bin | |||
Google/Acer C7 Chromebook | me.bin | |||
Google/Lenovo Thinkpad X131e Chromebook | me.bin | |||
Lenovo t530 | AMT | |||
Lenovo x230 | AMT | |||
Kotron KTQM77/mITX | AMT? | |||
Google/Acer C720 Chromebook | ? | Haswell |
| |
Google/HP Chromebook 14 | ? |
Why there is no replacement for it yet
Replacing the ME firmware is not that easy because:
- The ME bootrom checks the firmware signature.
- On recent chipset its RAM region is locked while it is allocated.
- Power glitches(by the ec) while the ME is checking its firmware is probably not practically doable.
So even if some people partially documented some ME firmware format, there is very few probability of having a free software replacement for it one day.
However coreboot also support other systems than the ones with recent intel CPU/chipsets. The List of supported mainboard list some of them.
- Some of theses don't have a management engine.
- Some ships without it enabled(that means that the hardware is not used).
- Some ships with it enabled, but it can be disabled not to use it at all, like on the Lenovo x200.
Replacing ME with smaller versions
Most PCs ship a 5MiB version of ME firmware. It is possible to use a smaller version (2MiB), but you have to make sure that it matches the chipset you are running on. You may want to use a smaller version to increase the maximum payload size by 3MiB. Search on the web for BIOS updates of different vendors with the same chipset and extract the ME using available tools. Once you found a smaller ME, you have to update your Intel flash descriptor and decrease the region that is used for ME.
See also
- http://me.bios.io/ME:About
- http://me.bios.io/ME
- Igor Skochinsky Paper very good and detailed presentation about ME
- decompress ME v6.x through ME v10 (prior to skylake)
- The respective flashrom page
References
<references/>