Board:emulation/spike-riscv: Difference between revisions
Jump to navigation
Jump to search
Line 4: | Line 4: | ||
These instructions may easily become out of date as coreboot or RISC-V moves forward. If that happens, please complain on the [[Talk:Board:emulation/spike-riscv|discussion page]] or IRC (or just fix it). | These instructions may easily become out of date as coreboot or RISC-V moves forward. If that happens, please complain on the [[Talk:Board:emulation/spike-riscv|discussion page]] or IRC (or just fix it). | ||
The instructions are also not yet complete. | |||
==Building the toolchain== | ==Building the toolchain== |
Revision as of 01:39, 30 June 2016
SPIKE is RISC-V's primary emulator. The Spike support in coreboot is mostly being developed by jn as part of his GSoC 2016.
Build instructions
These instructions may easily become out of date as coreboot or RISC-V moves forward. If that happens, please complain on the discussion page or IRC (or just fix it).
The instructions are also not yet complete.
Building the toolchain
- clone the coreboot git repository
- download and apply the following patches:
- run
make crossgcc-riscv
and a have a cup of $BEVERAGE
Building spike
- download Spike from https://github.com/riscv/riscv-isa-sim
- download and apply this patch that implements an 8250 UART
- TODO: fesvr: patch device_list_t::handle_command to ignore HTIF writes
- TODO: running make
Building coreboot without a payload
- You need the following patches:
- run
make menuconfig
and select Emulation/SPIKE ucb riscv from the Mainboard menu - run
make
- run
util/riscvtools/make-spike-elf.sh build/coreboot.rom build/coreboot.elf
to create an ELF file (spike can only load ELF files) - run
spike build/coreboot.elf
For general spike usage, look at its GitHub page.
Building Linux
git clone https://github.com/riscv/riscv-linux
- download linux 4.6.x from kernel.org
cd linux-4.6.x/arch; ln -s ../../riscv-linux/arch/riscv .
make ARCH=riscv defconfig
make ARCH=riscv menuconfig
, configure General setup/Cross-compiler tool prefixmake ARCH=riscv
Building bbl
- TODO: libc stuff
- TODO: payload linker script foo
- TODO: patching the console output handler
- mkdir build
- cd build; ../configure --with-payload=path/to/vmlinux CC=path/to/riscv64-unknown-elf-gcc LD=path/to/riscv64-unknown-elf-ld
- make
Building coreboot with bbl
- apply the same coreboot patches as above, and select Emulation/Spike ucb riscv
- in the Payload menu of
menuconfig
, select "ELF Payload" and enter the path to the bbl binary - run
make
and themake-spike-elf.sh
script as described above
boot log
TODO