Board:hp/2760p: Difference between revisions
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* WLAN | * WLAN | ||
* Linux (through SeaBIOS as payload) | * Linux (through SeaBIOS as payload) | ||
* Keyboard, trackpoint, touchpad | |||
* Fan control | |||
* Expresscard | |||
Not working: | Not working: | ||
* battery status | * battery status | ||
* digitizer | * digitizer | ||
Line 20: | Line 21: | ||
Not tested: | Not tested: | ||
* VGA | * VGA | ||
* Sound (integrated speakers, integrated mic, external headphones, external mic) | * Sound (integrated speakers, integrated mic, external headphones, external mic) | ||
* LAN | * LAN | ||
Line 31: | Line 31: | ||
* dock | * dock | ||
* msata | * msata | ||
* fn hotkeys | |||
== proprietary components status == | == proprietary components status == | ||
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The source code is at https://review.coreboot.org/#/c/18241/. You can check it out and rebase it on the master branch. | The source code is at https://review.coreboot.org/#/c/18241/. You can check it out and rebase it on the master branch. | ||
I've written [https://github.com/mytbk/hp_kbc1126/ this tool] for extracting the blobs needed by EC from OEM firmware, and inserting the blobs to build/coreboot.rom after building. | |||
== Flashing == | == Flashing == |
Revision as of 07:48, 24 March 2017
Thanks for your interest in HP Elitebook 2760p port. This port is a work in progress.
Status
Intel_Native_Raminit has it's own status page.
Tested and working:
- S3 (Suspend to RAM)
- RAM module combinations of 0+8G, 4G+8G
- USB
- Video (internal)
- WLAN
- Linux (through SeaBIOS as payload)
- Keyboard, trackpoint, touchpad
- Fan control
- Expresscard
Not working:
- battery status
- digitizer
Not tested:
- VGA
- Sound (integrated speakers, integrated mic, external headphones, external mic)
- LAN
- WWAN
- SD card slot
- Fingerprint reader
- Webcam
- Thermal management
- bluetooth
- dock
- msata
- fn hotkeys
proprietary components status
- CPU Microcode
- VGA Option ROM (optional)
- ME (Management Engine) firmware
- EC (Embedded Controller): The EC in this laptop is SMSC KBC1126. It needs two blobs in the flash chip. You can move the blob from 0x780000 to another address in the flash chip so that you can have a bigger CBFS size. Read this post for more info.
Building
The source code is at https://review.coreboot.org/#/c/18241/. You can check it out and rebase it on the master branch.
I've written this tool for extracting the blobs needed by EC from OEM firmware, and inserting the blobs to build/coreboot.rom after building.
Flashing
The flash chip of this laptop is socketed beside the WLAN slot. You can flash the firmware to another chip and replace it. The original flash chip is MX25L6445E.
You can also do an internal flashing with flashrom after you have coreboot installed and IFD unlocked.