JTAG/BSDL Guide: Difference between revisions

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Here is a sample session using the GPL'd jtag tool from within a bash shell when scanning the JTAG bus that has a Xilinx Spartan-3 FPGA & and Xilinx CPLD on it.
Here is a sample session using the GPL'd jtag tool from within a bash shell when scanning the JTAG bus that has a Xilinx Spartan-3 FPGA & and Xilinx CPLD on it.


jtag> cable parallel 0x378 DLC5
  jtag> cable parallel 0x378 DLC5
Initializing Xilinx DLC5 JTAG Parallel Cable III on parallel port at 0x378
  Initializing Xilinx DLC5 JTAG Parallel Cable III on parallel port at 0x378
jtag> detect
  jtag> detect
IR length: 14
  IR length: 14
Chain length: 2
  Chain length: 2
Device Id: 00000101000001000110000010010011
  Device Id: 00000101000001000110000010010011
  Manufacturer: Xilinx
    Manufacturer: Xilinx
  Unknown part!
    Unknown part!
Device Id: 00010001010000101000000010010011
  Device Id: 00010001010000101000000010010011
  Manufacturer: Xilinx
    Manufacturer: Xilinx
  Part:        xc3s1000_ft256
    Part:        xc3s1000_ft256
  Stepping:    0
    Stepping:    0
  Filename:    /usr/share/jtag/xilinx/xc3s1000_ft256/xc3s1000_ft256
    Filename:    /usr/share/jtag/xilinx/xc3s1000_ft256/xc3s1000_ft256
chain.c(110) Part 0 without active instruction
  chain.c(110) Part 0 without active instruction
chain.c(133) Part 0 without active instruction
  chain.c(133) Part 0 without active instruction
chain.c(110) Part 0 without active instruction
  chain.c(110) Part 0 without active instruction
jtag> instruction SAMPLE/PRELOAD
  jtag> instruction SAMPLE/PRELOAD
jtag> shift ir
  jtag> shift ir
chain.c(110) Part 0 without active instruction
  chain.c(110) Part 0 without active instruction
jtag>
  jtag>
 


= ''External JTAG Links'' =
= ''External JTAG Links'' =

Revision as of 00:06, 16 August 2005

Introduction

JTAG ports are still very uncommon on x86 hardware. However, most hardware designs are moving in that direction so future x86 chips will probably also have JTAG ports.

What is JTAG?

JTAG is an IEEE standard that has been adopted to provide a consistant way of programming and debugging chips. JTAG is supported by by a large number of chips and manufacturers. They include:

  • Many embedded PowerPC chips
  • Most ARM chips
  • Many flash chips
  • Most FPGA's

Using chips that support JTAG decreases software development time and decreases the costs of doing development. Chips that do not have JTAG support usually require expensive hardware to configure and debug them. (thousands to tens of thousands of dollars). This is prohibitive to most Linux developers.

Why JTAG?

If you are designing a new hardware and you are interested in supporting LinuxBIOS, you should make a JTAG port available and select chips which allow programming via JTAG. While this is not yet possible for higher end x86 chips, it is often possible for embedded designs.

How can I connect to a JTAG port from Linux?

For less than $20 you can buy a parallel to JTAG cable and be on your way. Once you have an adapter, you can use the jtag program that is part of the openwince sourceforge project.

I have the cable, now I can't talk to my chip.

The jtag program is still under development; lots of chips are not supported yet. Don't worry, you can add support for it. You need to find the corresponding BSDL file for the chip. Chip manufacturers provide BSDL files on their websites.

OK, I can see my chip over JTAG. Now what?

That depends on the chip. Some chips will let you program them, some CPU's will let you single step instructions and do debugging. It depends on the chip and the manufacturer. CPU's that support single stepping make BIOS development particularly easy.

Darn, my board doesn't have a JTAG port!

Darn, my chips don't work with JTAG!

Well, that's what being a smart consumer is about :) In general, don't buy hardware that isn't Linux friendly.

A sample session

Here is a sample session using the GPL'd jtag tool from within a bash shell when scanning the JTAG bus that has a Xilinx Spartan-3 FPGA & and Xilinx CPLD on it.

 jtag> cable parallel 0x378 DLC5
 Initializing Xilinx DLC5 JTAG Parallel Cable III on parallel port at 0x378
 jtag> detect
 IR length: 14
 Chain length: 2
 Device Id: 00000101000001000110000010010011
   Manufacturer: Xilinx
   Unknown part!
 Device Id: 00010001010000101000000010010011
   Manufacturer: Xilinx
   Part:         xc3s1000_ft256
   Stepping:     0
   Filename:     /usr/share/jtag/xilinx/xc3s1000_ft256/xc3s1000_ft256
 chain.c(110) Part 0 without active instruction
 chain.c(133) Part 0 without active instruction
 chain.c(110) Part 0 without active instruction
 jtag> instruction SAMPLE/PRELOAD
 jtag> shift ir
 chain.c(110) Part 0 without active instruction
 jtag>

External JTAG Links