Fallback mechanism

Introduction

The fallback mecanism permits to have 2 different romstage,ramstage,payload in the same images under a different prefix. The switch between both can be governed by an nvram configuration parameter.

New Howto (depends on code that is not yet merged)

• The code dependencies can be found in gerrit

Mandatory configuration (in make menuconfig)

You will have to make two configurations:

• one for the fallback image
• one for the normal image

First image

start configuring the first image with:

make menuconfig

Then configure it like that: Go in the following menu:

Architecture (x86)  --->

And then select that:

Bootblock behaviour (Switch to normal if CMOS says so)  --->

Which will bring that menu:

( ) Always load fallback
(X) Switch to normal if CMOS says so

Select the "Switch to normal if CMOS says so" line like described above.

In order to know if your computer booted correctly the last time, coreboot reads it in the nvram. There are two ways to make it know:

* The automatic way, which happens inside the ramstage of coreboot.
* The manual way, which happens when you want after the ramstage.

If you want it to happen after the ramstage Select the following menu:

General setup  --->

And inside select:

[*] Keep boot count

Verify that you have the following in .config (that make menuconfig just generated if you followed the previous instructions correctly)

CONFIG_X86_BOOTBLOCK_NORMAL=y
CONFIG_BOOTBLOCK_SOURCE="bootblock_normal.c"

If you selected "[*] Keep boot count", also verify that you have:

CONFIG_KEEP_BOOT_COUNT=y

Pseudo-diff

$ diff -u defconfig-fallback defconfig-normal
--- defconfig-fallback	2013-10-26 22:27:19.471326092 +0200
+++ defconfig-normal	2013-10-26 22:26:44.471328732 +0200

-CONFIG_LOCALVERSION="fallback-mode"
-CONFIG_CBFS_PREFIX="fallback"
+CONFIG_LOCALVERSION="normal-mode"
+CONFIG_CBFS_PREFIX="normal"
-# CONFIG_UPDATE_IMAGE is not set
+CONFIG_UPDATE_IMAGE=y

Compilation

Build script

#!/bin/sh
# In the cases where this work is copyrightable, it falls under the GPLv2
# or later license that is available here:
# https://www.gnu.org/licenses/gpl-2.0.txt

die() {
	echo
	echo "!!!! Compilation failed !!!!"
	exit 1
}

success() {
	echo
	echo "!!!! Compilation finished !!!!"
	echo
}

separator() {
	echo
	echo "!!!! First prefix compilation finished !!!!"
	echo
}

make clean || die

#fallback image
cp defconfig-fallback .config  || die
make  || die
./build/cbfstool ./build/coreboot.rom add -f .config -n config-fallback -t raw  || die

#because it will be re-included it in the second build...
#./build/cbfstool ./build/coreboot.rom remove -n etc/ps2-keyboard-spinup  || die
./build/cbfstool ./build/coreboot.rom remove -n pci8086,109a.rom  || die

cp ./build/coreboot.rom ./build-save/coreboot.rom.fallback || die
make clean || die
mkdir -p build/
cp ./build-save/coreboot.rom.fallback ./build/coreboot.rom || die
separator

#second prefix's build.

#normal image
cp defconfig-normal .config  || die
make  || die
./build/cbfstool ./build/coreboot.rom add -f .config -n config-normal -t raw  || die

success

Old Howto (will be replaced)

• build the coreboot image as usual, it will produce an image in build/coreboot.rom
• After the first build run:

make menuconfig

• Optionally change the payload.
• Go in

General setup  --->

• Change:

(fallback) CBFS prefix to use

To:

(normal) CBFS prefix to use

• Go back to the main menu and select:

Architecture (x86)  --->

select the following option:

[*] Update existing coreboot.rom image

Exit and save and rebuild...

The image will then have fallback and normal:

Name                           Offset     Type         Size
cmos_layout.bin                0x0        cmos_layout  1776
pci1002,9710.rom               0x740      optionrom    60928
fallback/romstage              0xf580     stage        92823
fallback/coreboot_ram          0x26080    stage        66639
fallback/payload               0x36540    payload      54976
config                         0x43c40    raw          4455
normal/romstage                0x44e00    stage        92823
normal/coreboot_ram            0x5b8c0    stage        68820
normal/payload                 0x6c600    payload      159949
(empty)                        0x93700    null         442136