User:GNUtoo

Hardware

Mainboard/Devices running coreboot

Device/Mainboard	Serial/output	flash recovery mecanism
M4A785T-M	Serial	External programmer Swapping the flash chip
Lenovo X60	Serial on the dock USB debug spkmodem	External programmer with pomona clip
Lenovo T60	USB debug spkmodem(untried but should work)	External programmer with pomona clip(untried but should work)
Alix 1.C	Serial	Hot swap with the LPC dongle
E350M1	Serial Some other outputs may work but I didn't test them.	External programmer Swapping the flash chip

Mainboard/Devices not running coreboot yet

• HP nc6320
• Asus N71JQ

Debugging tools

• External programmers :
  • Arduino duemillanove (serprog based)
  • Arduino uno (serprog based)
  • openmoko debug board (FTDI based)
  • bug20 (linux_spi)
• A pomona clip
• a null-modem serial cable and 2 USB<->Serial adapters
• USB debug compatible devices:
  • a bug20 (omap3530)
  • a GTA04 A3 (DM370)

Interesting git trees

• http://www.gitorious.org/gnutoo-for-coreboot/coreboot/ : I push there the code that is not yet ready for review.

My TODO list

See also TODO of the respectives machines on their dedicated wiki page.

All machines

• Add a working and easily usable normal/fallback selection. pushed for review
• Port a logging mecanism from chromebooks to all devices in order to be able to retrive the log of the failed boot at the next reboot.

T60

• Find out why the machine hang when the power supply is removed(only does it when the linux kernel is started) Fixed by ./nvramtool -w first_battery=Primary
• Add cmos.default(require disassembling the laptop for testing)
• Add native graphics init(require waiting that Peter stuge push his part for review)

X60

• native GPU init and new fallback are pushed for review: Address the concerns.
  • I pushed the new and complete native GPU init on gitorious, Peter Stuge will work on merging it while I finish fallback.
• fix the CPU microcode issue.
• update http://www.coreboot.org/Thinkpad_X60s
• Create a Native graphics<->VGA option rom.
• Make backlight work without the non-free option rom.

Later

• Improve the patch for SerialIce in order to get it merged.
• SD detection fix for my X60 version.
• Hotkey patch to clean and merge.

Alix 1.C

• Add cbmem -c support

Asus N71JQ

Probably not worth it...

• Find the USB debug port
• Find how to extract the BIOS pieces from the BIOS region

Howtos

make recent intel BIOS flash writable and/or extract its pieces

Coreboot has an uttility in util/ifdtool for that.

• power off the laptop totally (remove the power, the battery etc...)
• connect an external programmer to the BIOS flash chip.
• dump the chip content with flashrom and that external programmer.
• run ifdtool on the extracted chip content
• reflash the modified content

Native X60 GPU init stuff

scripts to help getting rid of the vbios of the x60

Script 1: generate the io access for the coreboot driver

• follow "Case study: new laptop (not complete, sorry)" in https://docs.google.com/document/d/1g8FMob25VZYxbWri2iFB8YiSL8gwF9vKJH3HGxr0xQU/edit?pli=1
• pacman -S plan9port
• cp /opt/plan9/bin/ssam ./
• replace the following line in ./ssam:

#!/usr/local/plan9/bin/rc

by the following line:

#!/opt/plan9/bin/rc

• create the ssamfix file with:

 ,s/\[ *[0-9]+\..[0-9]+\]//g
 ,s/^ *//g
y/^[RWU]/s/^/M /g
 ,s/\nU/ ;;;UDELAY/g
 ,|uniq -c
 ,s/^ *//g
 ,s/(^[0-9]+) ([MRW])/\2 \1/g
 ,s/"/\\"/g
 ,s/^M ([0-9]+) *(\[.*)/{M, \1, "\2"},/g
 ,s/^M ([0-9]+) *(.*)/{M, \1, "\2"},/g
 ,s/:  */:/g
 ,s/...UDELAY *([0-9]+)/\1/g
 ,s/^([RW]) ([0-9]+) (.*):0x([0-9a-f]+)(.*)/{\1, \2, "", \3, 0x\4, \5},/g

• run the following commands:

. /etc/profile.d/plan9.sh
cat dmesg| ./ssam  -f ssamfix > foo.c

Script2: compare the io access that were too fast

• Replace {V,0,}, with {V,7,}, in src/mainboard/vendor/device/i915io.c
• cat /dev/ttyUSB0 > accesses.txt
• Use that script against accesses.txt to find the guilty accesses:

#!/usr/bin/env python2
import sys,re
 
def main(args):
	try:
		f = open(args[1],'ro')
	except:
		print args[0], " <file>"

	for line in f:
		if re.match("0x[0-9]*: Got .*, expect .*",line):
			line = line.replace('\r\n',).replace(", expect ",':').replace(": Got ",':')
			split = line.split(':')
			#print split
			if split[1] != split[2]:
				print line
if __name__ == '__main__':
	main(sys.argv)

How to get semantic IOs

In i915tool:

• import your IOs in prettyregs.c
• compile prettyregs.c
• run prettyregs

How to get rid of the vbios of the x60 [New Version]

WARNING: DO NOT ATTEMPT TO DO THAT WITHOUT A FLASH RECOVERY MECANISM

Apply the coreboot patches, and adapt them for your mainboard

Then configure coreboot with:

[*] Output verbose x86emu debug messages
[ ]   Trace JMP/RETF
[ ]   Trace all opcodes
[ ]   Log Plug&Play accesses
[ ]   Log Disk I/O
[ ]   Log PMM
[ ]   Debug VESA BIOS Extensions
[ ]   Redirect INT10 output to console
[ ]   Log intXX calls
[ ]   Log special memory accesses
[ ]   Log all memory accesses
[*]   Log IO accesses

Build and flash coreboot.

git clone my fork of the i915tool until the code is merged in the official i915tool.

Get the tarball that contains the generated code, extract it.

Also get the i915_regs.h.gz file, decompress it and put it in final/

Then go into i915tool and apply some patches for the x60 or redo them for your mainboard.

Run make:

$ cd i915tool
$ make

Then go into the x60 directory(or the directory of your device):

$ cd x60

use picocom -b 115200 /dev/ttyUSB0 or stty to set the bauds of the Serial port. Then get logs:

$ cat /dev/ttyUSB0 | tee coreboot.log

Then remove the binary symbols, dos2unix will help identifying where they are:

$ dos2unix coreboot.log 
dos2unix: Binary symbol found at line 136332
dos2unix: Skipping binary file coreboot.log

Then do:

$ dos2unix coreboot.log

Then remove the lines before and after the log, the log looks like that:

[0047229e]c000:51cb outl(0x80001014, 0x0cf8)
[0047325f]c000:51d4 inw(0x0cfc) = 0x50a1

Then run make and fix the errors:

$ make

Then copy to coreboot as it says. Then if necessary try to compact the source code a bit, here for me I have a really long list of:

io_i915_write32(0xcffbe001,0x8001);
io_i915_write32(0xcffbe001,0x8005);
io_i915_write32(0xcffbe001,0x8009);
io_i915_write32(0xcffbe001,0x800d);
io_i915_write32(0xcffbe001,0x8011);

That can be replaced with:

int i = 0;
for (i=0x8001;i<0x3fffa;i+=4){
io_i915_write32(0xcffbe001,i);
}

Import the final code into the chromium fork of coreboot with my patches on top.