Shuttle SN25P
The wiki is being retired!
Documentation is now handled by the same processes we use for code: Add something to the Documentation/ directory in the coreboot repo, and it will be rendered to https://doc.coreboot.org/. Contributions welcome!
This is just a work-in-progress status page...
The port is not functional yet.
I started my work on Shuttle SN25P motherboard [[1]] by looking at Supported_Motherboards page, chose a supported one that has similar hardware (ASUS_A8N-E_Build_Tutorial)
Uwe told me where to start modifiying the code to adapt it to motherboard specificities, and more importantly, where to find the information to put in place.
Hardware:
- AMD K8 Northbridge
- NVIDIA CK804 Southbridge
- ITE IT8712F Super I/O
- AMD Opteron 165 dual core Socket 939
Additionally:
- RD1 BIOS Savior with XXXX Flash chips for work and backup
OK:
- flashrom from linux over legacy BIOS
- Serial console
- Coreboot runs
- Load & run payload (tested OK: filo & memtest86)
- Filo loads a kernel & jump to its entry point
- Kernel start to boot and hang at the console handling code, right after "Detected 1800.234 MHz processor."
NOK:
- VGA (not in coreboot, not in filo, not in memtest86, not in linux kernel)
- Keyboard (idem)
- Etherboot (onboard nvidia ethernet adapter not properly configured by coreboot)
- Network
Files:
- Config.lb - OK
- mptable.c - should be OK, linux kernel apic=debug output is identical as with legacy BIOS
- irq_tables.c - should be OK too
- get_bus_conf.c - WIP, still buggy
Information gathering:
- getpir
- mptable
- superiotool
- lspci -tnvv
- lspci -vvvxx
- setpci -s 0:0:1.0 7c.L
- setpci -s 0:0:1.0 80.L
- setpci -s 0:0:1.0 84.L
TODO:
- Make it boot to Xorg
- Test onboard HW: SATA, CDROM, USB, Firewire, mouse, keyboard, audio, fan & temperature control
- PCIe GFX & ethernet
- HPET
- ACPI
- Etherboot for BCM - TG3 PCIe 1x addon card
- LAB ? (may need bigger flash)
- Other payloads