User:GNUtoo

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Contributions

I've contributed to the following ports:

  • M4A785T-M: I've been the main person working on it.
  • Lenovo X60: I've been working on the native GPU init, and various other improvements.
  • Lenovo T60: I've been working on some improvements.
  • Alix 1.C: I've been working on some improvements.

Interests:

  • 100% Free computers(Laptops, Desktops, Home Servers, routers).
  • Security
    • Secure boot trough GRUB with full disk encryption (no /boot in clear)
    • Protect against DMA and other attacks that have access to the x86 cpu's RAM.
  • Making it possible for end user to be able to use coreboot/libreboot:
    • Making it easy or scalable to install coreboot/libreboot.
    • Making it usable.
  • Making less risky to reflash, permitting users without an external programmer to easily reflash, and developers to develop anywhere without a huge setup consisting of another computer and the coreboot computer beeing worked on. I'm also interested in getting the cbmem logs written to flash to make debugging easier when no other computer is available(for instance while the developer is traveling to a conference).

Howtos

make recent intel BIOS flash writable and/or extract its pieces

Coreboot has an uttility in util/ifdtool for that.

  • power off the laptop totally (remove the power, the battery etc...)
  • connect an external programmer to the BIOS flash chip.
  • dump the chip content with flashrom and that external programmer.
  • run ifdtool on the extracted chip content
  • reflash the modified content

Personal oppinions

Microcode

The issue about the CPU microcodes is that they are non-free, and under a license that is incompatible with coreboot's license.

Practically speaking, I guess that if the microcode is in the cbfs(coreboot filesystem) instead of beeing integrated directly in coreboot, that would count as agrgate work and should be safe, but I'm not a lawyer(so ask a good one instead). The solution would then be to remove the microcodes from the coreboot repositories.

(I guess that it would then end up in the blob repository instead which is a separate repository, and would then be included in the coreboot filesytem).

Some people say that the microcode is the equivalent of having a more recent CPU, as a justification for using it. Though since Intel microcodes are encrypted and signed, its meaning is not public, therefore we can't really know what's inside, so people usually trust what the CPU vendor say about it, such as that it fixes some bugs(erratas for such bugs are published).

My goal is to have a 100% free computer, and also to spread that code, so that other people can have a 100% free computer too. According to the FSF, and the FSF criterias for differenciating software from hardware, that microcode is software. So since they consider it as non-free, a coreboot image containing that microcode would not be considered free by the FSF.

On my Lenovo x60, the microcode was easy to remove, and it worked fine, beside printing a scary kernel message pointing to an Intel errata. Practically speaking, after resuming(so after suspend to ram), the temperatures reading will not be updated, and the temperature overheat will not be reported. The hardware issues you may encounter will depend on your specific CPU, not the model, but instead the date at which it was manufactured.

The result of it is that the FSF certified the gluglug's lenovo x60: gluglug removed the last microcodes(that were not used by the x60), sent that source code to the FSF, which certified it. So instead of debating trough huge flames aobut the fact that we should use, or not use the microcode, it was more effective to remove it. The benefit is the publicity arround that laptop that can be made 100% free software, which makes users aware of it and willing to switch to it.

Yabel

Yabel is great for tracing what the GPU does.

But the GPUs in the Lenovo x60 and t60 have a bar that gives access to the whole memory: 

Region 1: I/O ports at 50a0 [size=8]

So using Yabel to prevent the VGA option rom from doing nasty tricks is probably not safe enough.

I was told that many other GPU also have that issue.

The way to fix that is to get rid of the proprietary VGA option rom. On some boards it's possible and coreboot has a replacement for it. On some other boards, the kernel can initialize the GPU with or without tricks.

For coreboot developers

This section is mainly usefull for finding informations for:

  • Asking me to test some code (that's why I listed all my hardware).
  • Find my work in progress code.
  • Find legacy code.
  • Find what I'm interested in working on:
    • If you want to work on the same thing than me, you could contact me if you want so:
      • I could help if I have time.
      • I could test if I have time.
      • I may have some pointers.
  • HOWTO that documents how to do a native VGA init for the Lenovo x60:
    • It probably applies to the Lenovo t60 that have an Intel GPU, with no or very minor modifications.

Hardware

Mainboard/Devices running coreboot

Device/Mainboard Serial/output flash recovery mecanism My area of interest
M4A785T-M
  • Serial
  • External programmer
  • Swapping the flash chip
  • I've been the main porter.
  • Usability improvements
Lenovo X60
  • Serial on the dock
  • USB debug
  • spkmodem
 External programmer with pomona clip
  • Native GPU init
  • Secure boot with grub.
  • Usability improvements.
Lenovo X60T
  • None tried yet
  • I've no compatbile dock
 External programmer with pomona clip
  • Native GPU init
  • Touchscreen support
  • Usability improvements.
Lenovo X200T
  • None tried yet
  • I've no compatbile dock
 I didn't flash it yet.
  • Making it easier to flash.
  • Checking its security and freedom to see how it can compare to the Lenovo X60.
Lenovo T60
  • Serial on the dock
  • USB debug
  • spkmodem(untried but should work)
 External programmer with pomona clip(untried but should work)
  • Native GPU init
  • Usability improvements.
Alix 1.C
  • Serial
 Hot swap with the LPC dongle
  • Usability improvements.
E350M1
  • Serial
  • Some other outputs may work but I didn't test them.
  • External programmer
  • Swapping the flash chip
  • Powering off the GPU
  • Low noise home server use case

Mainboard/Devices not running coreboot (yet?)

  • HP nc6320 Not worth it. I don't have this laptop anymore.
  • Asus N71JQ

Note that they will probably never run coreboot, as I don't think they're worth the time.

Debugging tools

  • External programmers :
    • Arduino duemillanove (serprog based)
    • Arduino uno (serprog based)
    • openmoko debug board (FTDI based)
    • bug20 (linux_spi)
  • A pomona clip
  • a null-modem serial cable and 2 USB<->Serial adapters
  • USB debug compatible devices:
    • a bug20 (omap3530)
    • a GTA04 A3 (DM370)

My TODO list

See also TODO of the respectives machines on their dedicated wiki page.

All machines

  • Add a working and easily usable normal/fallback selection. pushed for review
  • Port a logging mecanism from chromebooks to all devices in order to be able to retrive the log of the failed boot at the next reboot.

T60

  • Find out why the machine hang when the power supply is removed(only does it when the linux kernel is started) Fixed by ./nvramtool -w first_battery=Primary
  • Add cmos.default(require disassembling the laptop for testing)
  • Add native graphics init(require waiting that Peter stuge push his part for review)
  • Export reboot_bits in cmos

X60

  • new fallback are pushed for review: Address the concerns.
    • I pushed the new and complete native GPU init on gitorious, Peter Stuge will work on merging it while I finish addressing the fallback comments. Merged, also improved a lot by Vladimir for instance.
  • fix the CPU microcode issue.
  • update http://www.coreboot.org/Thinkpad_X60s Has been taken care of by other people.
  • Create a Native graphics<->VGA option rom. Kevin did one in SeaBIOS.
  • Make backlight work without the non-free option rom. Now works, probably fixed by Vladimir. I've no idea why just writing to the backlight register didn't work before his work.

Later

  • Improve the patch for SerialIce in order to get it merged.
  • SD detection fix for my X60 version.
  • Hotkey patch to clean and merge. thinkpad_acpi loads nowadays. The patch was from Peter.

Alix 1.C

  • Add cbmem -c support
  • port the VSA to fasm?

Asus N71JQ

Probably not worth it...

  • Find the USB debug port
  • Find how to extract the BIOS pieces from the BIOS region

Native X60 GPU init stuff

scripts to help getting rid of the vbios of the x60

Script 1: generate the io access for the coreboot driver

#!/usr/local/plan9/bin/rc

by the following line: 

#!/opt/plan9/bin/rc
  • create the ssamfix file with:
 ,s/\[ *[0-9]+\..[0-9]+\]//g
 ,s/^ *//g
y/^[RWU]/s/^/M /g
 ,s/\nU/ ;;;UDELAY/g
 ,|uniq -c
 ,s/^ *//g
 ,s/(^[0-9]+) ([MRW])/\2 \1/g
 ,s/"/\\"/g
 ,s/^M ([0-9]+) *(\[.*)/{M, \1, "\2"},/g
 ,s/^M ([0-9]+) *(.*)/{M, \1, "\2"},/g
 ,s/:  */:/g
 ,s/...UDELAY *([0-9]+)/\1/g
 ,s/^([RW]) ([0-9]+) (.*):0x([0-9a-f]+)(.*)/{\1, \2, "", \3, 0x\4, \5},/g
  • run the following commands:
. /etc/profile.d/plan9.sh
cat dmesg| ./ssam  -f ssamfix > foo.c

Script2: compare the io access that were too fast

  • Replace {V,0,}, with {V,7,}, in src/mainboard/vendor/device/i915io.c
  • cat /dev/ttyUSB0 > accesses.txt
  • Use that script against accesses.txt to find the guilty accesses:
#!/usr/bin/env python2
import sys,re
 
def main(args):
	try:
		f = open(args[1],'ro')
	except:
		print args[0], " <file>"

	for line in f:
		if re.match("0x[0-9]*: Got .*, expect .*",line):
			line = line.replace('\r\n',).replace(", expect ",':').replace(": Got ",':')
			split = line.split(':')
			#print split
			if split[1] != split[2]:
				print line
if __name__ == '__main__':
	main(sys.argv)

How to get semantic IOs

In i915tool:

  • import your IOs in prettyregs.c
  • compile prettyregs.c
  • run prettyregs

How to get rid of the vbios of the x60 [New Version]

WARNING: DO NOT ATTEMPT TO DO THAT WITHOUT A FLASH RECOVERY MECANISM

Apply the coreboot patches, and adapt them for your mainboard

Then configure coreboot with: 

[*] Output verbose x86emu debug messages
[ ]   Trace JMP/RETF
[ ]   Trace all opcodes
[ ]   Log Plug&Play accesses
[ ]   Log Disk I/O
[ ]   Log PMM
[ ]   Debug VESA BIOS Extensions
[ ]   Redirect INT10 output to console
[ ]   Log intXX calls
[ ]   Log special memory accesses
[ ]   Log all memory accesses
[*]   Log IO accesses

Build and flash coreboot.

git clone my fork of the i915tool until the code is merged in the official i915tool.

Get the tarball that contains the generated code, extract it.

Also get the i915_regs.h.gz file, decompress it and put it in final/

Then go into i915tool and apply some patches for the x60 or redo them for your mainboard.

Run make: 

$ cd i915tool
$ make

Then go into the x60 directory(or the directory of your device): 

$ cd x60

use picocom -b 115200 /dev/ttyUSB0 or stty to set the bauds of the Serial port. Then get logs: 

$ cat /dev/ttyUSB0 | tee coreboot.log

Then remove the binary symbols, dos2unix will help identifying where they are: 

$ dos2unix coreboot.log 
dos2unix: Binary symbol found at line 136332
dos2unix: Skipping binary file coreboot.log

Then do: 

$ dos2unix coreboot.log

Then remove the lines before and after the log, the log looks like that: 

[0047229e]c000:51cb outl(0x80001014, 0x0cf8)
[0047325f]c000:51d4 inw(0x0cfc) = 0x50a1

Then run make and fix the errors: 

$ make

Then copy to coreboot as it says. Then if necessary try to compact the source code a bit, here for me I have a really long list of: 

io_i915_write32(0xcffbe001,0x8001);
io_i915_write32(0xcffbe001,0x8005);
io_i915_write32(0xcffbe001,0x8009);
io_i915_write32(0xcffbe001,0x800d);
io_i915_write32(0xcffbe001,0x8011);

That can be replaced with: 

int i = 0;
for (i=0x8001;i<0x3fffa;i+=4){
io_i915_write32(0xcffbe001,i);
}

Import the final code into the chromium fork of coreboot with my patches on top.

X60/I945 native GPU init History

The Lenovo X60 GPU init has been merged a long time ago. Since then it has been rewriten/improved a lot by other people (See git log for more details). Thanks to all that work it's now a proper driver.

So I've moved the X60 GPU init information in a subpage

Personal notes

Patches tracking

Coreboot

TODO

  • *T60*: export reboot_bits

fallback improvements

All the patches necessary to make it work got merged but one:

The remaining patch<ref>lenovo/x60: Require only one failed boot to switch to fallback in X86_BOOTBLOCK_NORMAL mode. </ref> add the following to the x60's Kconfig<ref>src/mainboard/lenovo/x60/Kconfig</ref>: 

config MAX_REBOOT_CNT
       int
       default 1

Another optional patch didn't get merged:

  • "Move set_boot_successful to drivers/pc80/mc146818rtc.c"


  • An old pushed topic branch can be found in gerrit
References

<references/>

ACPI patches for thinkpad_acpi

I've to look up the status of theses, thinkpad_acpi do load

Patches that need more work

  • I use a deblob patch, instead the various microcode should be moved out of coreboot repository, they are inside headers.

Infrastructure

  • "Add grub.cfg"

SerialICE

Flashrom

Other

00:52 < phcoder-screen> GNUtoo-irssi: once you asked why upper 128bytes of cmos behave in strange way: you have to enable them in rcba

To verify

  • I have bad memory on this, but I was probably told by someone who talked to peter stuge, or by peter stuge that if you blank the flash chip holding the BIOS, in an X61, power off the computer and power it on again, an IPV6 packet would come out of the (wired) NIC. This was due to AMT, which is on the NIC (X61 is old, and at that time AMT was on the intel ethernet NICs).
    • Once verified, the goal would be to reproduce that on an x200:
      • blank the BIOS flash chip, power off the computer, boot it.
      • observe an ipv6 packet
      • blank the NIC flash chip that holds its fimrware
      • hopefully observe no ipv6 packet
      • reflash coreboot inisde the BIOS flash chip

=> That may be able to produce a test case for knowing if the AMT firmware of the NIC was gone or not, but it does requires external reflashing. Would that be enough to be sure about the intel NIC of the laptops with a similar chipset?

Sandbox

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