The wiki is being retired!

Documentation is now handled by the same processes we use for code: Add something to the Documentation/ directory in the coreboot repo, and it will be rendered to https://doc.coreboot.org/. Contributions welcome!

This work is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or any later version. This work is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

This is work in progress!

Introduction

Hardware Overview

LinuxBIOS Overview

Serial output and the Super I/O

Northbridge

RAM init

Southbridge

Mainboard

IRQ Table

Creating a new Target

Miscellaneous Tips

minicom

Developer Manual