Infrastructure Projects

This page collects a list of projects to improve the infrastructure of coreboot v4. Infrastructure means those parts of the code that aren't chipset or mainboard specific, but are used by all of them. The idea is to consolidate a list of things "to do" with their status and responsible developers.

In progress

Low/High Tables

SeaBIOS requires a copy of various BIOS tables outside the fseg as it overwrites that segment. Generally clean out the table generation code.

Status: Upstream, implemented on some boards. There are problems on some chipsets/boards because of incorrect CONFIG_VIDEO_MB handling. The might be other issues, too (not clear, yet).

Vendor/chipset	Tested	Comments
amd/amdfam10	?	—
amd/amdht	?	—
amd/amdk8	?	—
amd/amdmct	?	—
amd/gx1	?	—
amd/gx2	?	—
amd/lx	?	—
intel/e7501	?	—
intel/e7520	?	—
intel/e7525	?	—
intel/i3100	?	—
intel/i440bx	?	—
intel/i82810	?	—
intel/i82830	?	—
intel/i855	?	—
intel/i945	Y	Tested on Kontron 986LCD-M and Roda RK886EX
via/cn400	?	—
via/cn700	Y	Tested on VIA pc2500e.
via/cx700	?	—
via/vt8601	?	—
via/vt8623	?	—
via/vx800	?	—

Developers: Stefan

Remove .c includes

Currently we include lots of code in the romstage using the preprocessor. This makes it harder to support new boards (where chipset components are supported already) and maintenance in general. So we should get rid of it where possible, using the linker for CAR boards and the build system for the remaining non-CAR boards appropriately.

Status: CAR boards only for now, to keep the project manageable. i945 is modified already, and boards based on it have only one or two remaining source files they include. Interacts with the next project "Move configuration to Kconfig", which ensures that code still sees all configuration when it is compiled separately.

Developers: Patrick, Uwe

Move configuration to Kconfig

Many boards have lots of #define VAR somevalue statements in their romstage.c which define how certain component drivers are compiled. With Kconfig, there's a better place to store them. This project is about moving all configuration values out of romstage.c (and other places if appropriate) and into Kconfig. util/lint/lint-001-no-global-config-in-romstage helps figuring out what remains to be done.

Status: Intel and VIA based boards should be mostly configuration free, AMD boards still have defines in their romstage. AMD/AGESA Boards have platform_cfg.h for which a solution should be found.

Developers: Patrick, Uwe

Unify ACPI

• Figure out generic ACPI code and deduplicate it.
• Fix issues like http://www.coreboot.org/pipermail/coreboot/2011-May/065179.html

Done:

• Every ACPI board has its own routines to compile the ACPI sources. Unify that.

CMOS handling

The subprojects are ordered in a way that minimizes lost work.

Done: Simplify get_option

Replace get_option(VALstart, VALlen, default) with a macro that hides start/len in something like get_option(VAL, default)

Implement a new cmos.layout format

The current layout is simple to parse, but not so simple to maintain or extend. Create a format that combines the various fields into a single representation, eg.

400/8 century enum { 0x19="1900", 0x20="2000", 0x21="2100" }

408/512 some_string string

984/16 checksum checksum 392 983

Implement an include statement

That way, we can have global fields (RTC, century byte), per chipset component fields (defined by northbrigde/southbridge/superio), per mainboard fields at their appropriate places.

CMOS defaults

Allow (somehow) to define defaults for all CMOS fields, and create a static table from that. Use that at runtime if the CMOS checksum fails. In the above format, it could simply be a suffix default=VALUE Also drop the "default" argument in get_options. As components have their own cmos.layout snippets, we can always take those definitions' defaults, even if mainboards don't make use of CMOS themselves.

Value overrides

A chipset might provide options (eg. SATA/IDE) that a board might override (eg. because it doesn't provide IDE even if the chipset would support it). Allow the mainboard to override config options. This wouldn't just set a new default, but drop the option from CMOS entirely, hardcoding the value in the build. Some autogenerated #ifdef/#define magic might help there.

Provide update paths and avoid conflicts in addressing

Research topic: How could updates to nvram configuration (eg. new fields) be handled safely, and how could we get away from carving out the CMOS memory space manually? (one proposal: http://article.gmane.org/gmane.linux.bios/64572)

Simple solution: Add smarts to flashrom: When running from coreboot, it has current cmos.layout and the table, as well as the new cmos.layout (and the new defaults). Take new defaults, fill up with current settings, and write the result to CMOS. This provides automatic values for new configuration options.

Checksums

The Linux kernel driver expects a non-inverted CMOS checksum for the "PC" area. coreboot inverts this checksum, which makes nvram unusable for the driver. This should be fixed.

Global variables

• Make use of global variables where appropriate.

Done:

• Provide v3 style global variables framework

More ideas

Unify UMA / onboard video code and config

Unify CONFIG_VIDEO_MB, CONFIG_GFXUMA, and similar options and make all code honor them.

Add / Unify / Test kconfig compile-time options and runtime CMOS options in coreboot

Some coreboot options are compile-time configurable only at the moment (via kconfig), but should also be runtime-configurable via CMOS/NVRAM options. We should fix this.

• Make all options (where it makes sense) run-time configurable via CMOS options, in addition to having sane compile-time defaults configured via kconfig.
• This includes many options which are northbridge-specific, many southbridge-specific, and some board-specific ones.
• Example options: Enable/disable IDE channel(s) / SATA / USB / SCSI / etc., enable/disable UDMA on older boards, amount of memory used for IGP/UMA, choice between IDE or NAND flash (on CS5536 boards), IDE 40/80 pin cable selection (VT8237R boards for example), and many more.
• Some of these options are already handled in the code via CMOS options, some are compile-time only so far, so do not yet exist at all.

Kconfig TODO

Notes / Style guide:

• Any bool variables that are (re-)defined to 'y' in Kconfig files can be simplified by using select FOO instead of the usual paragraph, as long as they're defined globally as default n boolean elsewhere.
• Use bool instead of boolean.
• Use default n instead of default false.

Various post-conversion things to consider:

• Consider ways to move crt0-y and ldscript-y out of $(src)/arch/i386/Makefile.inc where appropriate (ie. component specific)
• Make various CONFIG_* variable which were in each board's Kconfig file global or per-chipset options (instead of per-board). Examples:
  • UDELAY_TSC, TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 (also check UDELAY_IO, APIC, etc.)
  • ...

Stuff to port from v3 to v4:

• All boards that are in v3 but not in v4 (especially Geode LX stuff. Also check amd/model_gx*).
• Some remaining useful Kconfig options.

Clean up Assembler / Linker mess

• Drop / combine / normalize .ld/.lb/.lds linker scripts.
• Move them to a common place.
• Drop / combine / normalize .inc / .S files.

Geode issues

• Fix / Unify vsmsetup.c.
• Fix CS5535/CS5536/GX2/LX "chipsetinit" issue.
• Convert openvsa from MASM to something gnu as can use ( Or use JWasm as intermediate solution (it can compile MASM code) http://www.japheth.de/JWasm.html )

Stack and Suspend/Resume

• Use CONFIG_RAMBASE + HIGH_MEMORY_SAFE instead of 0x40000 for stack.

Fix Suspend/Resume on AMD64

• Use cbmem in romstage on the AMD64 board(s) that have suspend/resume.

Clear phases in romstage

• Split up the code (esp. in romstage) into more sensibly separated phases.
• Maybe use v3 for inspiration where the lines can be drawn.

Refactor SMBUS code

We have tons of duplication in the smbus/spd related functions and #defines. Every chipset (and sometimes board) does the same with the exception of the 2 or 3 boards that multiplex spd roms.

• Deduplicate SMBUS related defines, they're virtually everywhere (and all the same)
• Deduplicate the lowlevel functions - they should really be the same (except for some style differences)
• Deduplicate the non-multiplexing highlevel functions. Mark them weak, so multiplexing boards can simply provide their own variant, which override the weak functions automatically

Move all registers/chip definitions in XML format for all tools

For easy creating definitions of new chips, or editing old register definitions, improve readability support, and add support for humanless parsing the logs we decide move all data for msrtool, inteltool, superiotool, etc in XML-based format. See here: XML

Device dependency engine

We have a couple of places where we want to disable (or otherwise reconfigure) a device if another one is active: SATA and IDE covering the same ports, integrated graphics / plugin video cards, ... Right now, such things are done "somewhere", usually far away from any meaningful context. This idea isn't as actionable as the others as it's still missing even a sketch of a design.

• Find a good place (or multiple places) where such device decisions can be made
• Refactor the code to make use of it

Clean out duplicates

Tools like http://duplo.giants.ch/ or http://pmd.sourceforge.net/cpd.html might be able to help finding duplicates that can be factored out.

CONFIG_MAX_PHYSICAL_CPUS

CONFIG_MAX_PHYSICAL_CPUS should be dropped. It's set for all boards, but it's only really used by AMD K8 and newer systems (and not on Intel based systems at all). In the AMD code it is used wrongly:

• for determining which SPD offsets to include
• to determine APIC IDs
• possibly some more things

Add a config for selecting a SeaBIOS git revision

Currently there is only the choice between coreboot master and the lastest stable revision.

Finished

Finished projects are on a separate page now